This invention relates to printed circuit board connectors and, more particularly, to an improved multi-port coaxial connector assembly for printed circuit boards.
With the ever increasing speed of computer circuitry, new problems are discovered. The increased speed comes about from a reduction of the size of the components, which results in faster signal rise times to produce more electromagnetic radiation from the signal carrying conductors. As the size of the components is reduced, they become more sensitive to noise and cross-talk. This interference problem has in the past been solved by surrounding the signal carrying pin connected to the printed circuit board by other pins. These other pins are connected to ground to provide a "return path" for radiated signals so as to provide shielding.
While theoretically effective, the aforedescribed traditional shielding method has proven to be uneconomical because four to eight pins may be used per signal to provide cross-talk and noise immunity. With today's improved semiconductor processing technology, the printed circuit boards are exceedingly crowded with the greatly increased number of channels of communication which are required. Accordingly, the line width of the conductors has been shrinking from the traditional 0.015 inch width down to 0.003 inch.
Reducing the conductor line width has an impact on both economics and reliability. This is so because as the conductor width shrinks, random pin holes in the copper foil which are typically of 0.001 inch dimension represent a larger percentage of the conductor width. Such a discontinuity is difficult to detect during the manufacturing process, and therefore it severely impacts the manufacturing yield. Accordingly, a compromise is reached for the line width that produces an acceptable yield. Since the desired channel density is increasing and is projected to go to 600 channels per inch, it is apparent that connections cannot be accomplished in a single layer with the previously mentioned line widths. Therefore, multiple layer boards are used.
The use of multiple layer boards has both economic and technical limitations. The economic limitation is the cost per square inch per layer and therefore the more layers, the higher the cost and the higher the economic impact of a defective layer which results in non-acceptability of a board. As far as the technical limitations are concerned, there is a limit to the ratio of hole diameter to board thickness which can be achieved. As the boards become thicker, the "Z" axis expansion reaches a magnitude which exceeds the elastic limit of the copper plating in the hole, and the copper plating ruptures. It therefore follows that better economy can be achieved with a smaller number of layers balanced against a practical line width which produces adequate yields.
It is conventional to make connections to signals which are positioned at different layers on a printed circuit board by means of a plated-through hole into which a component lead is inserted. The connection between such leads and the plated-through hole is achieved either by the traditional method of soldering or by mechanical interference it is taught, for example, by U.S. Pat. No. 4,186,982. Both of these methods require a minimal practical diameter of a hole and a wall thickness of the plating sufficient to conduct the current and withstand the "Z" axis expansion of the laminated board. In traditional computer back panel technology, holes with diameters ranging from 0.030 inch to 0.040 inch are used. Since the holes are positioned on some sort of a grid, typically on 0.100 inch centers, the space between two adjacent holes is the space available on a layer through which to run conductors. There has to be an insulation space between the conductor and the plated-through hole, as well as between adjacent conductors. With the above mentioned dimensions, the space occupied by the hole is large and means must therefore be found to minimize the territory occupied by the plated-through hole.
The obvious solution is to reduce the diameter of the hole. However, there are at least two limiting factors. A first factor is that the component lead will have to be similarly reduced, which makes it difficult to handle the components without damaging them. A second factor is that the alignment of component leads to the holes becomes extremely difficult and the economics become prohibitive. It is therefore a primary objective of this invention to reduce the hole diameter while obviating the described limiting factors.